1. Field of the Invention
The present invention relates to a semiconductor device. In particular, the invention relates to a semiconductor device constructed by using transistors. In addition, the invention relates to a display device having the semiconductor device and an electronic apparatus having the display device.
Note that the semiconductor device herein means all devices that can function by utilizing the semiconductor characteristics.
2. Description of the Related Art
In recent years, self-luminous display devices having pixels each formed with a light-emitting element such as a light-emitting diode (LED) are drawing attention. As a light-emitting element used in such self-luminous display devices, there is an organic light-emitting diode (also referred to as an OLED (Organic Light-Emitting Diode), an organic EL element, an electroluminescence (EL) element, or the like), which is drawing attention to be used for EL displays. Since a light-emitting element such as an OLED is a self-luminous type, various advantages can be provided such that high visibility of pixels is ensured as compared to a liquid crystal display, no back light is required, high response speed is achieved and the like.
A self-luminous display device is constructed of a display and a peripheral circuit for inputting signals to the display. By disposing a light-emitting element in each pixel of the display and controlling emission/non-emission of each light-emitting element, images are displayed.
In each pixel of the display, a thin film transistor (hereinafter referred to as a TFT) is disposed. Here, description is made on a pixel configuration where two TFTs are disposed in each pixel in order to control emission/non-emission of a light-emitting element in each pixel (see Patent Document 1).
FIG. 21 shows a pixel configuration of a display. In a pixel portion 2100, data lines (also referred to as source signal lines) S1 to Sx, scan lines (also referred to as gate signal lines) G1 to Gy, and power source lines (also referred to as power supply lines) V1 to Vx are disposed. In addition, pixels of x (x is a natural number) columns and y (y is a natural number) rows are disposed. Each pixel has a selection transistor (also referred to as a switching TFT, a switch transistor or a SWTFT) 2101, a driving transistor (also referred to as a driving TFT) 2102, a holding capacitor 2103, and a light-emitting element 2104.
Description is made briefly on a driving method of the pixel portion 2100. When a scan line is selected in a selection period, the selection transistor 2101 is turned on and a potential of a data line at the time is written into a gate electrode (also referred to as a gate terminal) of the driving transistor 2102 through the selection transistor 2101. In the period after the selection period has terminated and until the next selection period starts, a potential of the gate electrode of the driving transistor 2102 is held in the holding capacitor 2103.
In the configuration of FIG. 21, when the relationship between the absolute values of a gate-source voltage (|Vgs|) of the driving transistor 2102 and the threshold voltage (|Vth|) of the driving transistor 2102 satisfies |Vgs|>|Vth|, the driving transistor 2102 is turned on and a current flows into the light-emitting element 2104 by a voltage between the power source line and a counter electrode connected to the light-emitting element 2104, thereby the light-emitting element 2104 is turned into the emission state. Meanwhile, when |Vgs|<|Vth| is satisfied, the driving transistor 2102 is turned off and no voltage is applied to the opposite electrodes of the light-emitting element 2104, thereby the light-emitting element 2104 is turned into the non-emission state.
In the pixel having the configuration of FIG. 21, two types of driving method are generally used for expressing gray scales, which are an analog gray scale method and a digital gray scale method.
The analog gray scale method is a method for expressing gray scales by changing the luminance of a light-emitting element, using an analog signal for a signal inputted to each pixel. On the other hand, the digital gray scale method is a method for expressing gray scales by controlling emission/non-emission of a light-emitting element only by controlling on/off of a switching element, using a signal inputted to each pixel.
In comparison with the analog gray scale method, the digital gray scale method is advantages in that it is hardly affected by characteristic variations of TFTs, and thus gray scales can be expressed more accurately.
As an example of the digital gray scale method, there is a time gray scale method. In the time gray scale method, gray scales are expressed by controlling the emission period of each pixel of a display device. Further, by using an erasing transistor (also referred to as an erasing TFT) in addition to the driving transistor and the selection transistor in each pixel in combination with the digital time gray scale method as disclosed in Patent Document 1, multi-gray scale display with high resolution can be achieved. In this specification, such a driving method is called an SES (Simultaneous Erasing Scan) drive.
In addition, in recent years, a display device having such a pixel configuration has been known that: a memory is incorporated in each pixel of a display portion in order to reduce power consumption of the display device (see Patent Document 2 and Patent Document 3).
[Patent Document 1] Japanese Patent Laid-Open No. 2001-343933
[Patent Document 2] Japanese Patent Laid-Open No. 2002-140034
[Patent Document 3] Japanese Patent Laid-Open No. 2005-049402
In the aforementioned pixel configuration disclosed in Patent Document 1, the power consumption of a data line driver circuit largely depends on the charging/discharging of a buffer therein. The power consumption P is generally calculated by using the following Formula (1), where F is frequency, C is capacitance, and V is voltage.P=FCV2 (F: Frequency, C: Capacitance, and V: Voltage  (1)
From the Formula (1), it can be seen that the voltage of a data line is desirably set to have a small amplitude by the data line driver circuit. Therefore, the voltage of a data line is set to have the minimum amplitude that allows on/off operation of the driving transistor. In other words, it is desirable to set the absolute value of a gate-source voltage (hereinafter referred to as Vgs) of the driving transistor to be large enough to certainly control the on/off operation of the driving transistor.
A potential of a data line to be inputted into a pixel is held in a holding capacitor after a selection period for turning on the selection transistor has terminated and until the next selection period for turning on the selection transistor starts.
However, there is such a problem that a potential that has been accumulated in the holding capacitor to be applied to the gate electrode of the driving transistor may fluctuate due to the effect of noise, a leakage potential from the selection transistor and the like, and thus the driving transistor may malfunction without being capable of keeping the normal on/off state.
In addition, there is another problem that the power consumption is undesirably increased if the voltage amplitude of the data line is increased in order to prevent malfunctions of the driving transistor that would be caused by fluctuations of a gate potential of the driving transistor. It can be seen from Formula (1) that the power consumption of a data line driver circuit increases in proportion to the square of a voltage; therefore, an increase in the voltage amplitude of a data line has a big influence on the power consumption.
Description is made in more detail with reference to FIG. 22 on problems concerning the conventional technique. In the pixel configuration shown in FIG. 22A, a pixel 2200 has a selection transistor 2201, a driving transistor 2202, a holding capacitor 2203, and a light-emitting element 2204. Note that the light-emitting element is driven with digital signals. In addition, the selection transistor is an n-channel transistor and the driving transistor is a p-channel transistor.
Description is made on a specific potential value of each power source line in FIG. 22A. A potential of a counter electrode 2208 of the light-emitting element 2204 is GND (hereinafter, 0 V), a potential of a power source line 2207 is 7 V, a high potential level (hereinafter indicated as an H level, an H potential or H) of a data line 2206 is 7 V, a low potential level (hereinafter indicated as an L level, an L potential or L) of the data line 2206 is 0 V, an H potential of a scan line 2205 is 10 V, and an L potential of the scan line 2205 is 0 V.
Needless to say, a potential of each wire, polarity of each transistor and the like are only examples, and therefore, the invention is not limited to them.
FIG. 22B shows a timing chart of potentials at the scan line, the data line and the node G when the light-emitting element is in the emission or non-emission state. In the period when the scan line 2205 is at 10 V, the selection transistor 2201 is turned on, and the node G receives a potential of the data line 2206. Thus, the potential of the data line 2206 is held in the holding capacitor 2203. If the potential held in the holding capacitor 2203 is not lower than the H potential, namely 7 V or more, the potential difference between the gate and source of the driving transistor 2202 becomes lower than the absolute value of the threshold voltage of the driving transistor 2202, thereby the driving transistor 2202 is turned off and the light-emitting element 2204 is turned into the non-emission state. On the other hand, if the potential held in the holding capacitor 2203 is not higher than the L potential, namely 0 V or less, the potential difference between the gate and source of the driving transistor 2202 becomes higher than the absolute value of the threshold voltage of the driving transistor 2202, thereby the driving transistor 2202 is turned on and the light-emitting element 2204 is turned into the emission state.
In the pixel configuration shown herein, a potential of the data line 2206 is directly written into the node G. Since the potential of the node G that is supplied from the data line 2206 controls on/off of the driving transistor 2202, the H potential of the data line 2206 is required to be equal to or higher than the potential of the power source line 2207, while the L potential of the data line 2206 is requited to be high enough to turn on the driving transistor 2202. In other words, it is required that the relationship between the voltage (Vel) applied to the light-emitting element 2204 and the source-drain voltage (Vds) of the driving transistor 2202 satisfy a condition to become Vel>Vds, which is required for operating the driving transistor 2202 in the linear region.
However, there is such a possibility that the potential of the node G may fluctuate due to variations or fluctuations of the threshold voltage of the driving transistor 2202, noise from outside during a holding period, a leakage potential from the selection transistor 2201 as shown in FIG. 22B, and the like, in which case the potential difference between the gate and source of the driving transistor 2202 fluctuates, and thus the driving transistor 2202 may malfunction without being capable of keeping the normal on/off state.
Thus, a semiconductor device having a conventional pixel configuration has a problem in that a potential applied to the gate electrode of the driving transistor fluctuates due to noise or a leakage potential from the selection transistor, which causes the driving transistor to malfunction. Further, even if a signal having a large potential amplitude is supplied from a data line, which is large enough to ensure the stable operation of the driving transistor, there arises another problem that the power consumption of a data line driver circuit is increased.